NXP Semiconductors /LPC5410x /I2C0 /STAT

Master Pending. Indicates that the Master is waiting to continue communication on the I2C-bus (pending) or is idle. When the master is pending, the MSTSTATE bits indicate what type of software service if any the master expects. This flag will cause an interrupt when set if, enabled via the INTENSET register. The MSTPENDING flag is not set when the DMA is handling an event (if the MSTDMA bit in the MSTCTL register is set). If the master is in the idle state, and no communication is needed, mask this interrupt.

0 (IN_PROGRESS): In progress. Communication is in progress and the Master function is busy and cannot currently accept a command.

1 (PENDING): Pending. The Master function needs software service or is in the idle state. If the master is not in the idle state, it is waiting to receive or transmit data or the NACK bit.

Master State code. The master state code reflects the master state when the MSTPENDING bit is set, that is the master is pending or in the idle state. Each value of this field indicates a specific required service for the Master function. All other values are reserved. See Table 346 for details of state values and appropriate responses.

0 (IDLE): Idle. The Master function is available to be used for a new transaction.

1 (RECEIVE_READY): Receive ready. Received data available (Master Receiver mode). Address plus Read was previously sent and Acknowledged by slave.

2 (TRANSMIT_READY): Transmit ready. Data can be transmitted (Master Transmitter mode). Address plus Write was previously sent and Acknowledged by slave.

3 (NACK_ADDRESS): NACK Address. Slave NACKed address.

4 (NACK_DATA): NACK Data. Slave NACKed transmitted data.

Master Arbitration Loss flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE.

0 (NO_ARBITRATION_LOSS): No Arbitration Loss has occurred.

1 (ARBITRATION_LOSS): Arbitration loss. The Master function has experienced an Arbitration Loss. At this point, the Master function has already stopped driving the bus and gone to an idle state. Software can respond by doing nothing, or by sending a Start in order to attempt to gain control of the bus when it next becomes idle.

Reserved. Read value is undefined, only zero should be written.

Master Start/Stop Error flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE.

0 (NO_STARTSTOP_ERROR): No Start/Stop Error has occurred.

1 (THE_MASTER_FUNCTION): The Master function has experienced a Start/Stop Error. A Start or Stop was detected at a time when it is not allowed by the I2C specification. The Master interface has stopped driving the bus and gone to an idle state, no action is required. A request for a Start could be made, or software could attempt to insure that the bus has not stalled.

Reserved. Read value is undefined, only zero should be written.

Slave Pending. Indicates that the Slave function is waiting to continue communication on the I2C-bus and needs software service. This flag will cause an interrupt when set if enabled via INTENSET. The SLVPENDING flag is not set when the DMA is handling an event (if the SLVDMA bit in the SLVCTL register is set). The SLVPENDING flag is read-only and is automatically cleared when a 1 is written to the SLVCONTINUE bit in the MSTCTL register. The point in time when SlvPending is set depends on whether the I2C block is in HSCAPABLE mode. See Section 23.7.1.2.2. When the I2C block is configured to be HSCAPABLE, HS master codes are detected automatically. Due to the requirements of the HS I2C specification, slave addresses must also be detected automatically, since the address must be acknowledged before the clock can be stretched.

0 (IN_PROGRESS): In progress. The Slave function does not currently need service.

1 (PENDING): Pending. The Slave function needs service. Information on what is needed can be found in the adjacent SLVSTATE field.

Slave State code. Each value of this field indicates a specific required service for the Slave function. All other values are reserved. See Table 347 for state values and actions.

0 (SLAVE_ADDRESS): Slave address. Address plus R/W received. At least one of the four slave addresses has been matched by hardware.

1 (SLAVE_RECEIVE): Slave receive. Received data is available (Slave Receiver mode).

2 (SLAVE_TRANSMIT): Slave transmit. Data can be transmitted (Slave Transmitter mode).

Slave Not Stretching. Indicates when the slave function is stretching the I2C clock. This is needed in order to gracefully invoke Deep Sleep or Power-down modes during slave operation. This read-only flag reflects the slave function status in real time.

0 (STRETCHING): Stretching. The slave function is currently stretching the I2C bus clock. Deep-Sleep or Power-down mode cannot be entered at this time.

1 (NOT_STRETCHING): Not stretching. The slave function is not currently stretching the I 2C bus clock. Deep-sleep or Power-down mode could be entered at this time.

Slave address match Index. This field is valid when the I2C slave function has been selected by receiving an address that matches one of the slave addresses defined by any enabled slave address registers, and provides an identification of the address that was matched. It is possible that more than one address could be matched, but only one match can be reported here.

0 (ADDRESS_0): Address 0. Slave address 0 was matched.

1 (ADDRESS_1): Address 1. Slave address 1 was matched.

2 (ADDRESS_2): Address 2. Slave address 2 was matched.

3 (ADDRESS_3): Address 3. Slave address 3 was matched.

Slave selected flag. SLVSEL is set after an address match when software tells the Slave function to acknowledge the address. It is cleared when another address cycle presents an address that does not match an enabled address on the Slave function, when slave software decides to NACK a matched address, or when there is a Stop detected on the bus. SLVSEL is not cleared if software NACKs data.

0 (NOT_SELECTED): Not selected. The Slave function is not currently selected.

1 (SELECTED): Selected. The Slave function is currently selected.

Slave Deselected flag. This flag will cause an interrupt when set if enabled via INTENSET. This flag can be cleared by writing a 1 to this bit.

0 (NOT_DESELECTED): Not deselected. The Slave function has not become deselected. This does not mean that it is currently selected. That information can be found in the SLVSEL flag.

1 (DESELECTED): Deselected. The Slave function has become deselected. This is specifically caused by the SLVSEL flag changing from 1 to 0. See the description of SLVSEL for details on when that event occurs.

Monitor Ready. This flag is cleared when the MONRXDAT register is read.

0 (NO_DATA): No data. The Monitor function does not currently have data available.

1 (DATA_WAITING): Data waiting. The Monitor function has data waiting to be read.

Monitor Overflow flag.

0 (NO_OVERRUN): No overrun. Monitor data has not overrun.

1 (OVERRUN): Overrun. A Monitor data overrun has occurred. This can only happen when Monitor clock stretching not enabled via the MONCLKSTR bit in the CFG register. Writing 1 to this bit clears the flag.

Monitor Active flag. Indicates when the Monitor function considers the I 2C bus to be active. Active is defined here as when some Master is on the bus: a bus Start has occurred more recently than a bus Stop.

0 (INACTIVE): Inactive. The Monitor function considers the I2C bus to be inactive.

1 (ACTIVE): Active. The Monitor function considers the I2C bus to be active.

Monitor Idle flag. This flag is set when the Monitor function sees the I2C bus change from active to inactive. This can be used by software to decide when to process data accumulated by the Monitor function. This flag will cause an interrupt when set if enabled via the INTENSET register. The flag can be cleared by writing a 1 to this bit.

0 (NOT_IDLE): Not idle. The I2C bus is not idle, or this flag has been cleared by software.

1 (IDLE): Idle. The I2C bus has gone idle at least once since the last time this flag was cleared by software.

Reserved. Read value is undefined, only zero should be written.

Event Time-out Interrupt flag. Indicates when the time between events has been longer than the time specified by the TIMEOUT register. Events include Start, Stop, and clock edges. The flag is cleared by writing a 1 to this bit. No time-out is created when the I2C-bus is idle.

0 (NO_TIME_OUT): No time-out. I2C bus events have not caused a time-out.

1 (EVENT_TIME_OUT): Event time-out. The time between I2C bus events has been longer than the time specified by the I2C TIMEOUT register.

SCL Time-out Interrupt flag. Indicates when SCL has remained low longer than the time specific by the TIMEOUT register. The flag is cleared by writing a 1 to this bit.

0 (NO_TIME_OUT): No time-out. SCL low time has not caused a time-out.

1 (TIME_OUT): Time-out. SCL low time has caused a time-out.

Reserved. Read value is undefined, only zero should be written.